HUDU

Protecting Chips Against Hold Time Violations Due to Variability


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Oktober 2013

Beschreibung

Beschreibung

With the development of Very-Deep Sub-Micron technologies, process variability is becoming increasingly important and is a very important issue in the design of complex circuits. Process variability is the statistical variation of process parameters, meaning that these parameters do not have always the same value, but become a random variable, with a given mean value and standard deviation. This effect can lead to several issues in digital circuit design.
The logical consequence of this parameter variation is that circuit characteristics, as delay and power, also become random variables. Because of the delay variability, not all circuits will now have the same performance, but some will be faster and some slower. However, the slowest circuits may be so slow that they will not be appropriate for sale. On the other hand, the fastest circuits that could be sold for a higher price can be very leaky, and also not very appropriate for sale. A main consequence of power variability is that the power consumption of some circuits will be different than expected, reducing reliability, average life expectancy and warranty of products. Sometimes the circuits will not work at all, due to reasons associated with process variations. At the end, these effects result in lower yield and lower profitability.
To understand these effects, it is necessary to study the consequences of variability in several aspects of circuit design, like logic gates, storage elements, clock distribution, and any other that can be affected by process variations. The main focus of this book will be storage elements.

Inhaltsverzeichnis

Introduction, Process Variations and Flip-Flops.
Process Variability.
Flip-Flops and Hold Time Violations.
Circuits Under Test.
Measurement Circuits.
Experimental Results.
Systematic and Random Variablility.
Normality Tests.
Probability of Hold Time Violations.
Protecting Circuits Against Hold Time Violations.
Padding Efficiency Of the Proposed Padding Algorithm.
Final Remarks.

Innenansichten

EAN: 9789400724273
Untertitel: 2014. Auflage. 25 schwarz-weiße und 51 farbige Abbildungen, 23 schwarz-weiße Tabellen, Bibliographie. eBook. Sprache: Englisch. Dateigröße in MByte: 5.
Verlag: Springer Netherlands
Erscheinungsdatum: Oktober 2013
Seitenanzahl: xi107
Format: pdf eBook
Kopierschutz: Adobe DRM
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