Morphological Image Processing: Architecture and VLSI design
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BeschreibungSummary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three.
Inhaltsverzeichnis1 Introduction.- 2 Image processing algorithms.- 3 Image processing architectures.- 4 Morphology based image processing.- 5 Pipelined low level image processing.- 6 Toward an architecture for low- and inter-mediate level 2D and 3D image processing.- 7 Conclusions.- References.- Samenvatting.- Appendices.-
Appendix A.- Masket for thinning in 2D (a).- Masket for thinning in 2D (b).- Masket for thinning in 3D.-
Appendix C.- Acknowledgements.- Curriculum Vitae.
Untertitel: 1992. Auflage. Book. Sprache: Englisch.
Erscheinungsdatum: Januar 1993
Seitenanzahl: 308 Seiten